Prof. Bae`s R.P.

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  • 18 S.-T. Lee, S. Lim, N. Choi, J.-H. Bae, C.-H. Kim, S. Lee, D. H. Lee, T. Lee, S. Chung, B.-G. Park and J.-H. Lee "Neuromorphic Technology Based on Charge Storage Memory Devices" Symposia on VLSI Technology and Circuits (VLSIT), 2018-06
  • 17 J.-H. Bae, S. Lim, D. Kwon, S. Lee, B.-G. Park and J.-H. Lee "Investigation of Current Saturation and Short Channel Effect in Gated Schottky Diode-type Synaptic Device under Reverse Bias Condition" IEEE Silicon Nanoelectronics Workshop (SNW), 2018-06
  • 16 S. Lim, J.-H. Bae, J.-H. Eum, S. Lee, C.-H. Kim, D. Kwon, and J.-H. Lee "Hardware-Based Neural Networks Using Gated Schottky Diode as Synapse Device" 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018-05
  • 15 J.-H. Bae, S. Lim, J.-H. Eum, B.-G. Park, J.-H. Lee "Behavior Analysis of Gated Schottky Diode as a Synaptic Device" The 25th Korean Conference on Semiconductors (KCS), 2018-02
  • 14 S. Lim, J.-H. Eum, J.-H. Bae, B.-G. Park, and J.-H. Lee "Design of Forward Propagation Using Gated Schottky Diodes" The 25th Korean Conference on Semiconductors (KCS), 2018-02
  • 13 D. Kwon, J.-H. Bae, S. Lim, J.-H. Um, S. Lee, and J.-H. Lee "Study on Source/Drain Metal Contact Characteristics in a Poly-Si Reconfigurable Field Effect Transistor" The 25th Korean Conference on Semiconductors (KCS), 2018-02
  • 12 J.-H. Eum, J.-H. Bae, and J.-H. Lee "Study on Source/Drain Metal Contact Characteristics in a Poly-Si Reconfigurable Field Effect Transistor" The 25th Korean Conference on Semiconductors (KCS), 2018-02
  • 11 J.-H. Bae, J.-M. Park, J.-H. Eum, W.-M. Kang, J. Kim, B.-G. Park, and J.-H. Lee "Reconfigurable device with programmable bottom gate array" The 24th Korean Conference on Semiconductors (KCS), 2017-02
  • 10 S. Lim, J.-H. Bae, J.-M. Park, J.-H. Eum, W.-M. Kang, C.-H. Kim, M.-S. Lee, S. Y. Woo, B.-G. Park, and J.-H. Lee "Synaptic devices based on reconfigurable gated schottky diodes for highly-linear potentiation" The 24th Korean Conference on Semiconductors (KCS), 2017-02
  • 9 J.-H. Eum, J.-M. Park, J.-H. Bae, W.-M. Kang, and J.-H. Lee "Study on source/drain metal contact in a poly-Si reconfigurable field effect transistor having double-gate structure" 2016 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 2016-07
  • 8 J.-H. Bae, and J. H. Lee "Dual-gate p-GaN gate HEMTs for steep subthreshold slope" The 22nd Korean Conference on Semiconductors (KCS), 2015-02
  • 7 J.-H. Bae, S. Hwang, J. Shin, H.-I. Kwon, C. H. Park, H. Choi, J.-B. Park, J. Kim, J. Ha, K. Park, J. Oh, J. Shin, U-I. Chung, K.-S. Seo, and J.-H. Lee "Analysis of DC/transient current and RTN behaviors related to traps in p-GaN gate HEMT" 2013 International Electron Devices Meeting (IEDM), 2013-12
  • 6 G. Kim, E. Park, J. H. Kim, J.-H. Bae, D. H. Kang, and B.-G. Park "Trap analysis of InGaN-based blue light emitting diodes using current-transient methodology" 2013 International Conference on Solid State Devices and Materials (SSDM), 2013-09
  • 5 J.-H. Bae, M. Jang, C. H. Park, B.-G. Park, and J.-H Lee "Characterization of low frequency noise in PtSi source/drain Schottky barrier junction SOI MOSFETs" The 20th Korean Conference on Semiconductors (KCS), 2013-02
  • 4 J.-H. Bae, I. Hwang, J.-M. Shin, H.-I. Kwon, C. H. Park, J. Ha, J. Lee,H. Choi, J. Kim, J.-B. Park, J. Oh, J. Shin, U-I. Chung, and J.-H. Lee "Characterization of Traps and Trap-Related Effects in Recessed-Gate Normally-off AlGaN/GaN-based MOSHEMT" 2012 International Electron Devices Meeting (IEDM), 2012-12
  • 3 M.-K. Jeong, S.-M. Joe, B.-S. Jo, H.-J. Kang, J.-H. Bae, K.-R. Han, E. Choi, G. Cho, S.-K. Park, B.-G. Park, and J.-H Lee "Characterization of traps in 3-D stacked NAND flash memory devices with tube-type poly-Si channel structure" 2012 International Electron Devices Meeting (IEDM), 2012-12
  • 2 J.-H. Bae, C.-H. Kim, and J.-H. Lee "Characterization of floating-base bipolar junction transistor as a 2-terminal select device for cross-point memory devices" The 19th Korean Conference on Semiconductors (KCS), 2012-02
  • 1 S.-M. Joe, M.-K. Jeong, M.-S. Lee, B.-S. Jo, J.-H. Bae, S.-K. Park, K.-R. Han, J.-H. Yi, G.-S. Cho, and J.-H. Lee "Extraction of 3-D trap position in NAND flash memory considering channel resistance of pass cells and bit-line interference" 2011 Symposium on VLSI Technology (VLSIT), 2011-06