Journal papers

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  • 359 S. Choi†, S. G. Seo†, H. R. Yu, S. Y. Kim, D. H. Kim*, and S. H. Jin*(†These authors equally contributed to this work & *co-corresponding authors) "Hydrophobic Polymer Encapsulation Effects on Subgap Density of States in Multi-Layered MoS2 Field Effect Transistors" Physica status solidi (a), vol. 14, no.1, p.1900492, DOI : 10.1002/pssr.201900492, 2019-12
  • 358 S. Choi†, S. Park†, J. Kim, Y. Seo, H. J. Shin, Y. S. Jeong, J. U. Bae, C. H. Oh, D. M. Kim, S. -J. Choi, and D. H. Kim* (†These authors equally contributed to this work) "Positive Bias Stress Instability of InGaZnO TFTs with Self-Aligned Top-Gate Structure in the Threshold-Voltage Compensated Pixel" IEEE Electron Device Lett., vol. 41, no., 1, pp. 50-53, DOI:10.1109/LED.2019.2954543, 2020-01
  • 357 S. Kim, Y. Lee, H.-D. Kim, S.-J. Choi* "Precision-extension technique for accurate vector-matrix multiplication with CNT transistor crossbar array" Nanoscale, vol. 11, no. 44, pp. 21449-21457, DOI: 10.1039/C9NR06715A, 2019-11
  • 356 Y. Seo, H.-S. Jeong, H.-Y. Jeong, S. Park, J. T. Jang, S. Choi, D. M. Kim, S.-J. Choi, X. Jin, H.-I. Kwon*, and D. H. Kim* (*co-corresponding authors) "Effect of Simultaneous Mechanical and Electrical Stress on the Electrical Performance of Flexible In-Ga-Zn-O Thin-Film Transistors" Materials, vol. 12, no. 19, p. 3248; doi:10.3390/ma12193248,2019-10, 2019-10
  • 355 M. Uhm, J.-M. Lee, J. Lee, J. H. Lee, S. Choi, B.-G. Park, D. M. Kim, S.-J. Choi, H.-S. Mo, Y.-J. Jeong,* and D. H. Kim* (*co-corresponding authors) "Ultrasensitive Electrical Detection of Hemagglutinin for Point-of-Care Detection of Influenza Virus Based on a CMP-NANA Probe and Top-Down Processed Silicon Nanowire Field-Effect Transistors" Sensors, vol. 19, no. 20, p. 4502, DOI : 10.3390/s19204502, 2019-10
  • 354 S. Kim, H.-D. Kim, and S.-J. Choi* "Impact of Synaptic Device Variations on Classification Accuracy in a Binarized Neural Network " Scientific Rerpots, vol. 9, p. 15237, DOI:10.1038/s41598-019-51814-5, 2019-10
  • 353 S. Choi, J.-Y. Kim, H. Kang, D. Ko, J. Rhee, S.-J. Choi, D. M. Kim, and D. H. Kim "Effect of Oxygen Content on Current Stress-Induced Instability in Bottom-Gate Amorphous InGaZnO Thin-Film Transistors" Materials, vol. 12, no. 19p. 3149, DOI : 10.3390/ma12193149, 2019-10
  • 352 S. Choi†, S. Kim†, J. Jang, J. Kim, D. M. Kim, S.-J. Choi, H.-S. Mo, S. M. Lee*, and D. H. Kim* (†These authors equally contributed to this work,*co-corresponding authors) "Oxygen Content and Bias Influence on Amorphous InGaZnO TFT-Based Temperature Sensor Performance" IEEE Electron Device Lett., vol. 40, no, 10. pp. 1666-1669, DOI: 10.1109/LED.2019.2937157, 2019-10
  • 351 S. Choi, S. Kim, J. Jang, G. Ahn, J. T. Jang, J. Yoon, T. J. Park, B.-G. Park, D. M. Kim, S.-J. Choi, S. M. Lee, E. Y. Kim, H. S. Mo*, D. H. Kim* (*co-corresponding authors) "Implementing an Artificial Synapse and Neuron Using a Si Nanowire Ion-Sensitive Field-Effect Transistor and Indium-Gallium-Zinc-Oxide Memristors" Sensors and Actuators B:Chemical, vol. 296, no. 126616, pp. 1-9, DOI: 10.1016/j.snb.2019.05.093, 2019-10
  • 350 S. Choi, S. Park, J.-Y. Kim, J. Rhee, H. Kang, D. M. Kim, S.-J. Choi, D. H. Kim* "Influence of the gate/drain voltage configuration on the current stress instability in amorphous indium-zinc-oxide thin-film transistors with self-aligned top-gate structure" IEEE Electron Device Letters, vol. 40, no. 9, pp. 1431-1434, DOI : 10.1109/LED.2019.2927378, 2019-09
  • 349 J. T. Jang†, G. Ahn†, S.-J. Choi, D. M. Kim, and D. H. Kim (†These authors equally contributed to this work) "Control of the Boundary between the Gradual and Abrupt Modulation of Resistance in the Schottky Barrier Tunneling-Modulated Amorphous Indium-Gallium-Zinc-Oxide Memristors for Neuromorphic Computing" Electronics, vol. 8, no. 10, p. 1087, 2019-09, doi: 10.3390/electronics8101087, 2019-09
  • 348 H. B. Yoo, J. Kim, J. Yoo, H.-J. Kim, S.-J. Choi, D. H. Kim, and D. M. Kim "Capacitance-Voltage Technique for Characterization of Lateral Trap Locations along the Channel in Field Effect Transistors" Solid-State Electronics, vol. 163,p. 107647, DOI: 10.1016/j.see.2019.107647, 2020-01, 2019-09
  • 347 S. Kim, B. Choi, J. Yoon, Y. Lee, H.-D. Kim, M.-H, Kang, and S.-J. Choi* "Binarized Neural Network with Silicon Nanosheet Synaptic Transistors for Supervised Pattern Classification" Scientific Reports, vol. 9, p. 11705, DOI:10.1038/s41598-019-48048-w, 2019-08
  • 346 Y. Lee, H. Jung, B. Choi, J. Yoon, H. B. Yoo, H.-J. Kim, G.-H. Park, D. M. Kim, D. H. Kim, M.-H. Kang*, and S.-J. Choi* (*co-corresponding authors) "Flexible carbon nanotube Schottky diode and its integrated circuit applications" RSC Advances, vol. 9, no. 38, pp. 22124-22128, DOI:10.1039/c9ra02855b, 2019-07
  • 345 J.-H. Bae, S. Lim, D. Kwon, J.-H. Eum, S. Lee, H. Kim, B.-G. Park, and J.-H. Lee "Near-Linear Potentiation Mechanism of Gated Schottky Diode as a Synaptic Device" IEEE Journal of the Electron Device Society, vol. 7, pp. 335-343, doi: 10.1109/JEDS.2019.2898674, 2019-02
  • 344 L. Lee, J. W. Hwang, J. W. Jung, J. C. Kim, H. I. Lee, S. W.Heo, M. H. Yoon, S. Choi, N. V. Long, J. S. Park, J. W. Jeong, J. Kim, K. R. Kim, D. H.Kim, S. I. Im, B. H. Lee, K. J. Cho, M. M. Sung* "ZnO Composite nanolayer with mobility edge quantization for multi-value logic transistors" Nature communications, vol. 10, no. 1998, pp. 1-9, DOI : 10.1038/s41467-019-09998-x , 2019-03
  • 343 Y.-T. Seo, M.-S. Lee, C.-H. Kim, S. Y. Woo, J.-H. Bae, B.-G. Park, and J.-H. Lee "Si-based FET-type synaptic device with short-term and long-term plasticity using high-k gate stack" IEEE Transactions on Electron Devices, vol. 66, no. 2, pp. 917-923, doi: 10.1109/TED.2018.2888871, 2019-02
  • 342 S. Choi, J.-Y Kim, J. Rhee, H. Kang, S. Park, D. M. Kim, S.-J Choi, D. H. Kim* "Method to extract interface and bulk trap separately over the full sub-gap range in amorphous InGaZnO thin-film transistors by using various channel thicknesses" IEEE Electron Device Letters, vol. 40, no. 4, pp. 574-577, DOI 10.1109/LED.2019.2898217, 2019-04
  • 341 K. Lee†, J.-H. Bae†, S. Kim, J.-H. Lee, B.-G. Park, and D. Kwon, (†These authors equally contributed to this work) "Ferroelectric-Gate Field-Effect Transistor Memory with Recessed Channel" IEEE Electron Device Letters, vol. 41, no. 8, pp. 1201-1204, doi: 10.1109/LED.2020.3001129, 2020-08
  • 340 M.-K. Park, H.-N. Yoo, Y.-T. Seo, S. Y. Woo, J.-H. Bae, B.-G. Park, and J.-H. Lee "Field Effect Transistor-Type Devices Using High-κ Gate Insulator Stacks for Neuromorphic Applications" ACS Applied Electronic Materials, vol. 2, no. 2, pp. 323-328, doi: 10.1021/acsaelm.9b00698, 2019-12